High Resolution Analog Front Ends
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Technology Node: TSMC-130nm G CMOS Process
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Silicon Proven: Yes
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10bit-ADC with 32MHz Sampling, DNL<0.5LSB and INL<2LSB
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4th Order BPF with 4MHz BW with fine tuning to cutoff
frequencies
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32dB VGA with 2dB gain step
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Fully integrated Frac-N PLL
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8bit-DAC with 32MHz Sampling Clock
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The AFE enables a transceiver suitable for communicating over the DC wiring of an array of photovoltaic (PV) modules with integrated switching regulators
Analog IPs