High Resolution Analog Front Ends

  • Technology Node: TSMC-130nm G CMOS Process

  • Silicon Proven: Yes

  • 10bit-ADC with 32MHz Sampling, DNL<0.5LSB and INL<2LSB

  • 4th Order BPF with 4MHz BW with fine tuning to cutoff


  • 32dB VGA with 2dB gain step

  • Fully integrated Frac-N PLL

  • 8bit-DAC with 32MHz Sampling Clock

  • The AFE enables a transceiver suitable for communicating over the DC wiring of an array of photovoltaic (PV) modules with integrated switching regulators